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  publication release date: april 24, 2006 - 1 - revision 1.2 isd2560/75/90/120 single-chip, multiple-messages, voice record/playback device 60-, 75-, 90-, and 120-second duration
isd2560/75/90/120 - 2 - 1. general description winbond?s isd2500 chipcorder ? series provide high-quality, singl e-chip, record/playback solutions for 60- to 120-second messaging applications. the cmos devices include an on-chip oscillator, microphone preamplifier, automatic gain control, antialiasing filter, smoot hing filter, speaker amplifier, and high density multi-level storage array. in additi on, the isd2500 is microcontroller compatible, allowing complex messaging and addressing to be achieved. recordings are stored into on-chip nonvolatile memory cells, providing zero-power me ssage storage. this unique, single-chip solution is made possible through winbond?s patented multilevel storage technology. voice and audio signals are stored directly into memory in their natural form, providing high-quality, solid -state voice reproduction. 2. features ? easy-to-use single-chip, voice record/playback solution ? high-quality, natural voice/audio reproduction ? single-chip with duration of 60, 75, 90, or 120 seconds. ? manual switch or microcontroller compatible ? playback can be edge- or level-activated ? directly cascadable for longer durations ? automatic power-down (push-button mode) - standby current 1 a (typical) ? zero-power message storage - eliminates battery backup circuits ? fully addressable to handle multiple messages ? 100-year message retention (typical) ? 100,000 record cycles (typical) ? on-chip clock source ? programmer support for play-only applications ? single +5 volt power supply ? available in die form, pdip, soic and tsop packaging ? packaged type: leaded and lead-free ? temperature = die (0 c to +50 c) and package (0 c to +70 c)
isd2560/75/90/120 publication release date: april 24, 2006 - 3 - revision 1.2 3. block diagram internal clock timing sampling clock 480k cell nonvolatile multilevel storage array analog transceivers decoders device control power conditioning automatic gain control (agc) 5-pole active antialiasing filter 5-pole active smoothing filter amp pre- amp sp + sp - eom ce p/r ovf pd v cca v ssa v ssd v ccd agc mic ref mic xclk amp ana in ana out mux aux in address buffers a0 a1 a2 a3 a4 a5 a6 a7 a8 a9
isd2560/75/90/120 - 4 - 4. table of contents 1. general d escription......................................................................................................... ......... 2 2. features .................................................................................................................... ..................... 2 3. block diagram............................................................................................................... ................ 3 4. table of cont ents ........................................................................................................... ........... 4 5. pin conf igurati on ........................................................................................................... ............ 5 6. pin des cription ............................................................................................................. ................ 6 7. functional descript ion...................................................................................................... .... 10 7.1. detailed descrip tion...................................................................................................... .............. 10 7.2. operat ional modes ......................................................................................................... ............ 11 7.2.1. operational modes descr iption........................................................................................... . 12 8. timing diagrams............................................................................................................. ............. 16 9. absolute maxi mum ratings.................................................................................................... 19 9.1 operati ng condi tions ....................................................................................................... ............ 20 10. electrical character istics ............................................................................................... 21 10.1. parameters for packaged parts ............................................................................................ .. 21 10.1.1. typical parameter variation with voltage and temperatur e (packaged parts) ................ 24 10.2. paramete rs for die ....................................................................................................... ........... 25 10.2.1. typical parameter variation with voltage and tem perature (die) .................................... 28 10.3. parameters fo r push-bu tton mode.......................................................................................... 29 11. typical applic ation ci rcuit ................................................................................................ . 30 12. package drawing and dime nsions .................................................................................... 35 12.1. 28-lead 300-mil plastic sm all outline ic (s oic)..................................................................... 35 12.2. 28-lead 600-mil plastic d ual inline pa ckage (p dip) ............................................................... 36 12.3. 28-lead 8x13.4mm plastic thin sm all outline package (tsop) type 1 ................................ 37 12.4. 28-lead 8x13.4mm plastic thin small outline package (tso p) type 1 - iqc ...................... 38 12.5. isd2560/75/95/120 product b onding physical layout (die) [1] ................................................ 39 13. ordering informat ion....................................................................................................... .... 41 14. version history ............................................................................................................ ........... 42
isd2560/75/90/120 publication release date: april 24, 2006 - 5 - revision 1.2 5. pin configuration soic/pdip a0/m0 a1/m1 a2/m2 a3/m3 a4/m4 a5/m5 a6/m6 a7 a8 a9 aux in v ssd v ssa sp + p/r xclk eom pd ce ovf ana out ana in agc mic ref mic v cca sp- v ccd 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 isd2560* ana out ana in agc mic ref mic v cca sp- sp+ v ssa v ssd aux in a9 a8 a7 ovf ce pd eom xclk p/r v ccd a0/m0 a1/m1 a2/m2 a3/m3 a4m4 a5/m5 a6/m6 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 tsop isd2560* * same pinouts for isd2575 / 2590 / 25120 products
isd2560/75/90/120 - 6 - 6. pin description pin no. pin name soic/ pdip tsop function ax/mx 1-10/ 1-7 8-17/ 8-14 address/mode inputs : the address/mode inputs have two functions depending on the level of the two most significant bits (msb) of the address pins (a8 and a9). if either or both of the two msbs are low, the inputs are all interpreted as address bits and are used as the start address for the current record or playback cy cle. the address pins are inputs only and do not output any internal address information during the operation. address inputs are latched by the falling edge of ce . if both msbs are high, the addre ss/mode inputs are interpreted as mode bits according to the operational mode table on page 12. there are six operational modes (m0?m6) available as indicated in the table. it is possible to use multiple operational modes simultaneously. operational modes are sampled on each falling edge of ce , and thus operational modes and direct addressing are mutually exclusive. aux in 11 18 auxiliary input: the auxiliary input is multiplexed through to the output amplifier and speaker output pins when ce is high, p/ r is high, and playback is currently not active or if the device is in playback overflow. when cascading multiple isd2500 devices, the aux in pin is used to connect a playback signal from a following device to the previous output speaker drivers. for noise considerations, it is suggested t hat the auxiliary input not be driven when the storage array is active. v ssa , v ssd 13, 12 20, 19 ground : the isd2500 series of devices utilizes separate analog and digital ground busses. these pins should be connected separately through a low-impedance path to power supply ground. sp+/sp- 14/15 21/22 speaker outputs : all devices in the isd2500 series include an on- chip differential speaker driver, capable of driving 50 mw into 16 ? from aux in (12.2mw from memory). [1] the speaker outputs are held at v ssa levels during record and power down. it is therefore not possible to parallel speaker outputs of multiple isd2500 devices or t he outputs of other speaker drivers. [2] a single-end output may be used (including a coupling capacitor between the sp pin and the speaker). these outputs may be used individually with the output signal taken from either pin. however, the use of single-end output results in a 1 to 4 reduction in its output power. [1] connection of speaker outputs in para llel may cause damage to the device. [2] never ground or drive an unused speaker output.
isd2560/75/90/120 publication release date: april 24, 2006 - 7 - revision 1.2 pin no. pin name soic/ pdip tsop function v cca , v ccd 16, 28 23, 7 supply voltage : to minimize noise, the analog and digital circuits in the isd2500 series devices use separate power busses. these voltage busses are brought out to separate pins and should be tied together as close to the supply as possible. in addition, these supplies should be decoupled as close to the package as possible. mic 17 24 microphone : the microphone pin transfers input signal to the on- chip preamplifier. a built-in automatic gain control (agc) circuit controls the gain of this preamplifier from ?15 to 24db. an external microphone should be ac coupled to this pin via a series capacitor. the capacitor value, together with the internal 10 k ? resistance on this pin, determines the low-fr equency cutoff for the isd2500 series passband. see winbond?s application information for additional information on low-frequency cutoff calculation. mic ref 18 25 microphone reference : the mic ref input is the inverting input to the microphone preamplifier. this provides a noise-canceling or common-mode rejection input to the device when connected to a differential microphone. agc 19 26 automatic gain control : the agc dynamically adjusts the gain of the preamplifier to compensate for the wide range of microphone input levels. the agc allows the full range of whispers to loud sounds to be recorded with minimal distortion. the ?attack? time is determined by the time constant of a 5 k ? internal resistance and an external capacitor (c2 on the schematic of figure 5 in section 11) connected from the agc pin to v ssa analog ground. the ?release? time is determined by the time constant of an external resistor (r2) and an external capac itor (c2) connected in parallel between the agc pin and v ssa analog ground. nominal values of 470 k ? and 4.7 f give satisfactory results in most cases. ana in 20 27 analog input : the analog input transfers analog signal to the chip for recording. for microphone inputs, the ana out pin should be connected via an external capacitor to the ana in pin. this capacitor value, together with the 3.0 k ? input impedance of ana in, is selected to give additional cutoff at the low-frequency end of the voice passband. if the desired i nput is derived from a source other than a microphone, the signal can be fed, capacitively coupled, into the ana in pin directly. ana out 21 28 analog output : this pin provides the preamplifier output to the user. the voltage gain of the preamplifier is determined by the voltage level at the agc pin.
isd2560/75/90/120 - 8 - pin no. pin name soic/ pdip tsop function ovf 22 1 overflow : this signal pulses low at the end of memory array, indicating the device has been filled and the message has overflowed. the ovf output then follows the ce input until a pd pulse has reset the device. this pin can be used to cascade several isd2500 devices together to increase record/playback durations. ce 23 2 chip enable : the ce input pin is taken low to enable all playback and record operations. the address pins and playback/record pin (p/ r ) are latched by the falling edge of ce . ce has additional functionality in the m6 (push-button) operational mode as described in the operational mode section. pd 24 3 power down : when neither record nor playback operation, the pd pin should be pulled high to place the part in standby mode (see i sb specification). when overflow ( ovf ) pulses low for an overflow condition, pd should be brought high to reset the address pointer back to the beginning of the memory array. the pd pin has additional functionality in the m6 (push-button) operation mode as described in the operational mode section. eom 25 4 end-of-message : a nonvolatile marker is automatically inserted at the end of each recorded message. it remains there until the message is recorded over. the eom output pulses low for a period of t eom at the end of each message. in addition, the isd2500 series has an internal v cc detect circuit to maintain message integrity should v cc fall below 3.5v. in this case, eom goes low and the device is fixed in playback-only mode. when the device is configured in operational mode m6 (push- button mode), this pin provides an active-high signal, indicating the device is currently recordi ng or playing. this signal can conveniently drive an led for vis ual indicator of a record or playback operation in process.
isd2560/75/90/120 publication release date: april 24, 2006 - 9 - revision 1.2 pin no. pin name soic/ pdip tsop function xclk 26 5 external clock : the external clock input has an internal pull-down device. the device is configured at the factory with an internal sampling clock frequency centered to 1 percent of specification. the frequency is then maintained to a variation of 2.25 percent over the entire commercial temperature and operating voltage ranges. if greater precision is r equired, the device can be clocked through the xclk pin as follows: part number sample rate required clock isd2560 8.0 khz 1024 khz isd2575 6.4 khz 819.2 khz isd2590 5.3 khz 682.7 khz isd25120 4.0 khz 512 khz these recommended clock rates should not be varied because the antialiasing and smoothing filters ar e fixed, and aliasing problems can occur if the sample rate differs from the one recommended. the duty cycle on the input clock is not critical, as the clock is immediately divided by two. if the xclk is not used, this input must be connected to ground. p/ r 27 6 playback/record : the p/ r input pin is latched by the falling edge of the ce pin. a high level selects a playback cycle while a low level selects a record cycle. for a record cycle, the address pins provide the starting address and recording continues until pd or ce is pulled high or an overflow is detected (i.e. the chip is full). when a record cycle is terminated by pulling pd or ce high, then end-of-message ( eom ) marker is stored at the current address in memory. for a play back cycle, the address inputs provide the starting address and the device will play until an eom marker is encountered. the device can continue to pass an eom marker if ce is held low in address mode, or in an operational mode. (see operational modes section)
isd2560/75/90/120 - 10 - 7. functional description 7.1. d etailed d escription speech/sound quality the winbond?s isd2500 series includes devices offe red at 4.0, 5.3, 6.4, and 8.0 khz sampling frequencies, allowing the user a choice of speech quality options. increasing the duration within a product series decreases the sampling frequency and bandwidth, which affects the sound quality. please refer to the isd2560/75/90/120 product summa ry table below to compare the duration, sampling frequency and filter pass band. the speech samples are stored directly into the on- chip nonvolatile memory without any digitization and compression associated like other solutions. dire ct analog storage provides a very true, natural sounding reproduction of voice, music, tones, and sound effects not available with most solid state digital solutions. duration to meet various system require ments, the isd2560/75/90/120 products offer single-chip solutions at 60, 75, 90, and 120 seconds. parts may also be cascaded together for longer durations. table 1: isd2560/75/90/120 product summary part number duration (seconds) input sample rate (khz) typical filter pass band * (khz) isd2560 60 8.0 3.4 isd2575 75 6.4 2.7 isd2590 90 5.3 2.3 isd25120 120 4.0 1.7 * 3db roll-off point eeprom storage one of the benefits of winbond?s chipcorder ? technology is the use of on-chip nonvolatile memory, providing zero-power message storage. the message is retained for up to 100 years typically without power. in addition, the device can be re -recorded typically over 100,000 times. microcontroller interface in addition to its simplicity and ease of use, the is d2500 series includes all the interfaces necessary for microcontroller-driven applications. the address and control lines can be interfaced to a microcontroller and manipulated to perform a vari ety of tasks, including message assembly, message concatenation, predefined fixed mess age segmentation, and message management.
isd2560/75/90/120 publication release date: april 24, 2006 - 11 - revision 1.2 programming the isd2500 series is also ideal for playback-onl y applications, where single or multiple messages are referenced through buttons, switches, or a microcontroller. once the desired message configuration is created, duplicates c an easily be generated via a gang programmer. 7.2. o perational m odes the isd2500 series is designed with several built -in operational modes that provide maximum functionality with minimum external components. t hese modes are described in details as below. the operational modes are accessed via the address pins and mapped beyond the normal message address range. when the two most significant bi ts (msb), a8 and a9, are high, the remaining address signals are interpreted as mode bits and not as address bits. therefore, operational modes and direct addressing are not compatible and cannot be used simultaneously. there are two important considerations for using o perational modes. first, all operations begin initially at address 0 of its memory. later operations can begin at other address locations, depending on the operational mode(s) chosen. in addition, the addre ss pointer is reset to 0 when the device is changed from record to playback, playback to record (except m6 mode), or when a power-down cycle is executed. second, operational modes are executed when ce goes low. this operational mode remains in effect until the next low-going ce signal, at which point the current mode(s) are sampled and executed. table 2: operational modes mode [1] function typical use jointly compatible [2] m0 message cueing fast-forward through messages m4, m5, m6 m1 delete eom markers position eom marker at the end of the last message m3, m4, m5, m6 m2 not applicable reserved n/a m3 looping continuous playback from address 0 m1, m5, m6 m4 consecutive addressing record/playback multiple consecutive messages m0, m1, m5 m5 ce level-activated allows message pausing m0, m1, m3, m4 m6 push-button control simplified device interface m0, m1, m3 [1] besides mode pin needed to be ?1?, a8 and a9 pin are also requir ed to be ?1? in order to enter into the related operational mode. [2] indicates additional operational modes which c an be used simultaneously with the given mode.
isd2560/75/90/120 - 12 - 7.2.1. operational modes description the operational modes can be used in conjunction with a microcontroller, or they can be hardwired to provide the desired system operation. m0 ? message cueing message cueing allows the user to skip through messages, without knowing the actual physical addresses of each message. each ce low pulse causes the internal address pointer to skip to the next message. this mode is used for playback only, and is typically used with the m4 operational mode. m1 ? delete eom markers the m1 operational mode allows sequentially recorded messages to be combined into a single message with only one eom marker set at the end of the final message. when this operational mode is configured, messages recorded sequentia lly are played back as one continuous message. m2 ? unused when operational modes are selected, the m2 pin should be low. m3 ? message looping the m3 operational mode allows for the automat ic, continuously repeated playback of the message located at the beginning of the address space. a message can completely fill the isd2500 device and will loop from beginning to end without ovf going low. m4 ? consecutive addressing during normal operation, the address pointer will reset when a message is played through an eom marker. the m4 operational mode inhibits the address pointer reset on eom , allowing messages to be played back consecutively. m5 - ce -level activated the default mode for isd2500 devices is for ce to be edge-activated on playback and level- activated on record. the m5 operational mode causes the ce pin to be interpreted as level- activated as opposed to edge-activated during playback. this is especially useful for terminating playback operations using the ce signal. in this mode, ce low begins a playback cycle, at the beginning of the device memory. the pl ayback cycle continues as long as ce is held low. when ce goes high, playback will immediately end. a new ce low will restart the message from the beginning unless m4 is also high.
isd2560/75/90/120 publication release date: april 24, 2006 - 13 - revision 1.2 m6 ? push-button mode the isd2500 series contain a push-button oper ational mode. the push-button mode is used primarily in very low-cost applications and is des igned to minimize external circuitry and components, thereby reducing system cost. in order to configur e the device in push-button operational mode, the two most significant address bits must be high, and the m6 mode pin must also be high. a device in this mode always powers down at the end of each playback or record cycle after ce goes high. when this operational mode is implemented, thr ee of the pins on the device have alternate functionality as described in the table below. table 3: alternate functionality in pins pin name alternate functionality in push-button mode ce start/pause push-button (low pulse-activated) pd stop/reset push-button (high pulse-activated) eom active-high run indicator ce (start/pause) in push-button operational mode, ce acts as a low-going pulse-activated start/pause signal. if no operation is currently in progress, a low-going pulse on this signal will initiate a playback or record cycle according to the level on the p/ r pin. a subsequent pulse on the ce pin, before an eom is reached in playback or an overflow condi tion occurs, will pause the current operation, and the address counter is not reset. another ce pulse will cause the device to continue the operation from the place where it is paused. pd (stop/reset) in push-button operational mode, pd acts as a high-going pulse-activated stop/reset signal. when a playback or record cycle is in progre ss and a high-going pulse is observed on pd, the current cycle is terminated and the address pointer is reset to address 0, the beginning of the message space. eom (run) in push-button operational mode, eom becomes an active-high run signal which can be used to drive an led or other external device. it is high whenever a record or playback operation is in progress. recording in push-button mode 1. the pd pin should be low, usually using a pull-down resistor.
isd2560/75/90/120 - 14 - 2. the p/ r pin is taken low. 3. the ce pin is pulsed low. recording starts, eom goes high to indicate an operation in progress. 4. when the ce pin is pulsed low. recording pauses, eom goes back low. the internal address pointers are not cleared, but the eom marker is stored in memory to indicate as the message end. the p/ r pin may be taken high at this time. any subsequent ce would start a playback at address 0. 5. the ce pin is pulsed low. recording starts at the next address after the previous set eom marker. eom goes back high. [3] 6. when the recording sequences are finished, the final ce pulse low will end the last record cycle, leaving a set eom marker at the message end. recording may also be terminated by a high level on pd, which will leave a set eom marker. playback in push-button mode 1. the pd pin should be low. 2. the p/ r pin is taken high. 3. the ce pin is pulsed low. playback starts, eom goes high to indicate an operation in progress. 4. if the ce pin is pulsed low or an eom marker is encountered during an operation, the part will pause. the internal address pointers are not cleared, and eom goes back low. the p/ r pin may be changed at this time. a subsequent record operation would not reset the address pointers and the re cording would begin where playback ended. 5. ce is again pulsed low. playback starts where it left off, with eom going high to indicate an operation in progress. 6. playback continues as in steps 4 and 5 unt il pd is pulsed high or overflow occurs. 7. if in overflow, pulling ce low will reset the address pointer and start playback from the beginning. after a pd pulse, the part is reset to address 0. note: push-button mode can be used in conjunction with modes m0, m1, and m3. [3] if the m1 operational mode pin is also high, the just previously written eom bit is erased, and recording starts at that address.
isd2560/75/90/120 publication release date: april 24, 2006 - 15 - revision 1.2 good audio design practices winbond products are very high-quality single-chip vo ice recording and playback systems. to ensure the highest quality voice reproduction, it is impor tant that good audio design practices on layout and power supply decoupling be followed. see applicat ion information or below links for details. good audio design practices http://www.winbond-usa.com/products/isd_produc ts/chipcorder/applicationinfo/apin11.pdf single-chip board layout diagrams http://www.winbond-usa.com/products/isd_produc ts/chipcorder/applicationinfo/apin12.pdf
isd2560/75/90/120 - 16 - 8. timing diagrams don't care don't care ce p/r pd a0-a9 mic ana in ovf t ce t set t hold t pdh t set t pud t pds t pdr t ovf don't care don't care figure 1: record don't care ce p/r pd a0-a9 sp+/- ovf t ce t set t hold t pdh t set t pds t pdp t ovf t eom t pud eom don't care don't care don't care figure 2: playback
isd2560/75/90/120 publication release date: april 24, 2006 - 17 - revision 1.2 t ce ce p/r pd a0-a9 mic ana in ovf eom (start/pause) (stop/reset) (run) notes (1) (2) (3) (4, 5) (6, 7) (8) t ce t ce t set t set t set t set t set t set t pd t pause t run t db t db t db t pud t pud start start pause stop figure 3: push-button mode record ce p/r pd a0-a9 sp+/- ovf eom (start/pause) (stop/reset) (run) notes (1) (2) (3) (4, 5) (6, 7) (8) t ce t ce t set t set t set t set t set t set t pd t pause t run t db t db t db t pud t pud start start pause stop figure 4: push-button mode playback
isd2560/75/90/120 - 18 - notes for push-button modes: 1. a9, a8, and a6 = 1 for push-button operation. 2. the first ce low pulse performs a start function. 3. the part will begin to play or record after a power-up delay t pud . 4. the part must have ce high for a debounce period t db before it will recognize another falling edge of ce and pause. 5. the second ce low pulse, and every even pulse ther eafter, performs a pause function. 6. again, the part must have ce high for a debounce period t db before it will recognize another falling edge of ce , which would restart an operation. in addition, the part will not do an internal power down until ce is high for the t db time. 7. the third ce low pulse, and every odd pulse therea fter, performs a resume function. 8. at any time, a high level on pd will stop the current function, reset t he address counter, and power down the device.
isd2560/75/90/120 publication release date: april 24, 2006 - 19 - revision 1.2 9. absolute maximum ratings table 4: absolute maximum ratings (die) condition value junction temperature 150 c storage temperature range -65 c to +150 c voltage applied to any pad (v ss ?0.3v) to (v cc +0.3v) voltage applied to any pad (input current limited to 20ma) (v ss ?1.0v) to (v cc +1.0v) v cc ? v ss -0.3v to +7.0v table 5: absolute maximum ratings (packaged parts) condition value junction temperature 150 c storage temperature range -65 c to +150 c voltage applied to any pin (v ss ?0.3v) to (v cc +0.3v) voltage applied to any pin (input current limited to 20 ma) (v ss ?1.0v) to (v cc +1.0v) lead temperature (soldering ? 10sec) 300 c v cc ? v ss -0.3v to +7.0v note: stresses above those listed may cause pe rmanent damage to the devic e. exposure to the absolute maximum ratings may affect dev ice reliability and performance. functional operation is not impli ed at these conditions.
isd2560/75/90/120 - 20 - 9.1 o perating c onditions table 6: operating conditions (die) condition value commercial operating temperature range 0 c to +50 c supply voltage (v cc ) [1] +4.5v to +6.5v ground voltage (v ss ) [2] 0v table 7: operating conditions (packaged parts) condition value commercial operating temperature range [3] 0 c to +70 c supply voltage (v cc ) [1] +4.5v to +5.5v ground voltage (v ss ) [2] 0v [1] v cc = v cca = v ccd [2] v ss = v ssa = v ssd [3] case temperature
isd2560/75/90/120 publication release date: april 24, 2006 - 21 - revision 1.2 10. electrical characteristics 10.1. p arameters f or p ackaged p arts table 8: dc parameters ? packaged parts parameter symbol min [2] typ [1] max [2] units conditions input low voltage v il 0.8 v input high voltage v ih 2.0 v output low voltage v ol 0.4 v i ol = 4.0 ma output high voltage v oh v cc - 0.4 v i oh = -10 a ovf output high voltage v oh1 2.4 v i oh = -1.6 ma eom output high voltage v oh2 v cc ? 1.0 v cc - 0.8 v i oh = -3.2 ma v cc current (operating) i cc 25 30 ma r ext = [3] v cc current (standby) i sb 1 10 a [3] input leakage current i il r 1 a input current high w/pull down i ilpd 130 a force v cc [4] output load impedance r ext 16 ? speaker load preamp input resistance r mic 4 9 15 k ? mic and mic ref pins aux in input resistance r aux 5 11 20 k ? ana in input resistance r ana in 2.3 3 5 k ? preamp gain 1 a pre1 21 24 26 db agc = 0.0v preamp gain 2 a pre2 -15 5 db agc = 2.5v aux in/sp+ gain a aux 0.98 1.0 v/v ana in to sp+/- gain a arp 21 23 26 db agc output resistance r agc 2.5 5 9.5 k ? notes: [1] typical values @ t a = 25o and v cc = 5.0v. [2] all min/max limits are guaranteed by winbond via electrical test ing or characterization. no t all specifications are 100 percent tested. [3] v cca and v ccd connected together. [4] xclk pin only.
isd2560/75/90/120 - 22 - table 9: ac parameters ? packaged parts characteristic symbol min [2] typ [1] max [2] units conditions sampling frequency isd2560 isd2575 isd2590 isd25120 f s 8.0 6.4 5.3 4.0 khz khz khz khz [7] [7] [7] [7] filter pass band isd2560 isd2575 isd2590 isd25120 f cf 3.4 2.7 2.3 1.7 khz khz khz khz 3 db roll-off point [3][8] 3 db roll-off point [3][8] 3 db roll-off point [3][8] 3 db roll-off point [3][8] record duration isd2560 isd2575 isd2590 isd25120 t rec 58.1 72.6 87.1 116.1 60.0 75.0 90.0 120.0 62.0 77.5 93.0 123.9 sec sec sec sec commercial operation [7] commercial operation [7] commercial operation [7] commercial operation [7] playback duration isd2560 isd2575 isd2590 isd25120 t play 58.1 72.6 87.1 116.1 60.0 75.0 90.0 120.0 62.0 77.5 93.0 123.9 sec sec sec sec commercial operation commercial operation commercial operation commercial operation ce pulse width t ce 100 nsec control/address setup time t set 300 nsec control/address hold time t hold 0 nsec power-up delay isd2560 isd2575 isd2590 isd25120 t pud 24.1 30.2 36.2 48.2 25.0 31.3 37.5 50.0 27.8 34.3 40.8 53.6 msec msec msec msec commercial operation commercial operation commercial operation commercial operation pd pulse width (record) isd2560 isd2575 isd2590 isd25120 t pdr 25.0 31.25 37.5 50.0 msec msec msec msec
isd2560/75/90/120 publication release date: april 24, 2006 - 23 - revision 1.2 table 9: ac parameters ? packaged parts (cont?d) characteristic symbol min [2] typ [1] max [2] units conditions pd pulse width (play) isd2560 isd2575 isd2590 isd25120 t pdp 12.5 15.625 18.75 25.0 msec msec msec msec pd pulse width (static) t pds 100 nsec [6] power down hold t pdh 0 nsec eom pulse width isd2560 isd2575 isd2590 isd25120 t eom 12.5 15.625 18.75 25.0 msec msec msec msec overflow pulse width t ovf 6.5 sec total harmonic distortion thd 1 2 % @ 1 khz speaker output power p out 12.2 50 mw r ext = 16 ? [4] voltage across speaker pins v out 2.5 v p-p r ext = 600 ? mic input voltage v in1 20 mv peak-to-peak [5] ana in input voltage v in2 50 mv peak-to-peak aux input voltage v in3 1.25 v peak-to-peak; r ext = 16 ? notes: [1] typical values @ t a = 25oc and v cc = 5.0v. [2] all min/max limits are guaranteed by winbond via electrical test ing or characterization. no t all specifications are 100 percent tested. [3] low-frequency cutoff depends upon the value of ex ternal capacitors (see pin descriptions) [4] from aux in; if ana in is driven at 50 mv p-p, the p out = 12.2 mw, typical. [5] with 5.1 k ? series resistor at ana in. [6] t pds is required during a static condition, typically overflow. [7] sampling frequency and playback duration can vary as much as r 2.25 percent over the commercial temperature range. for greater stability, an external clock can be utilized (see pin descriptions) [8] filter specification applies to the antialia sing filter and the smoothing filter. theref ore, from input to output, expect a 6 d b drop by nature of passing through both filters.
isd2560/75/90/120 - 24 - 10.1.1. typical parameter variation with voltage and temperature (packaged parts) -40 25 70 85 temperature (c) 5.5 volts 4.5 volts percent change (%) -1.0 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 chart 4: oscillator stability -40 25 70 85 temperature (c) 5.5 volts 4.5 volts 0 5 10 15 20 25 operating current (ma) chart 1: record mode operating current (i cc ) -40 25 70 85 temperature (c) 5.5 volts 4.5 volts percent distortion (%) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0 chart 2: total harmonic distortion -40 25 70 85 temperature (c) 5.5 volts 4.5 volts standby current (ma) 0 0.2 0.4 0.6 0.8 1.0 1.2 chart 3: standby current (i sb )
isd2560/75/90/120 publication release date: april 24, 2006 - 25 - revision 1.2 10.2. p arameters f or d ie table 10: dc parameters ? die parameter symbol min [2] typ [1] max [2] units conditions input low voltage v il 0.8 v input high voltage v ih 2.0 v output low voltage v ol 0.4 v i ol = 4.0 ma output high voltage v oh v cc - 0.4 v i oh = -10 a ovf output high voltage v oh1 2.4 v i oh = -1.6 ma eom output high voltage v oh2 v cc ? 1.0 v cc - 0.8 v i oh = -3.2 ma v cc current (operating) i cc 25 30 ma r ext = [3] v cc current (standby) i sb 1 10 a [2] input leakage current i il r 1 a input current high w/pull down i ilpd 130 a force v cc [4] output load impedance r ext 16 ? speaker load preamp in input resistance r mic 4 9 15 k ? mic and mic ref pads aux in input resistance r aux 5 11 20 k ? ana in input resistance r ana in 2.3 3 5 k ? preamp gain 1 a pre1 21 24 26 db agc = 0.0v preamp gain 2 a pre2 -15 5 db agc = 2.5v aux in/sp+ gain a aux 0.98 1.0 v/v ana in to sp+/- gain a arp 21 23 26 db agc output resistance r agc 2.5 5 9.5 k ? notes: [1] typical values @ t a = 25 q c and v cc = 5.0v. [2] all min/max limits are guaranteed by winbond via electrical test ing or characterization. no t all specifications are 100 percent tested. [3] v cca and v ccd connected together. [4] xclk pad only.
isd2560/75/90/120 - 26 - table 11: ac parameters ? die characteristic symbol min [2] typ [1] max [2] units conditions sampling frequency isd2560 isd2575 isd2590 isd25120 f s 8.0 6.4 5.3 4.0 khz khz khz khz [7] [7] [7] [7] filter pass band isd2560 isd2575 isd2590 isd25120 f cf 3.4 2.7 2.3 1.7 khz khz khz khz 3 db roll-off point [3][8] 3 db roll-off point [3][8] 3 db roll-off point [3][8] 3 db roll-off point [3][8] record duration isd2560 isd2575 isd2590 isd25120 t rec 58.1 72.6 87.1 116.1 60.0 75.0 90.0 120.0 62.0 77.5 93.0 123.9 sec sec sec sec commercial operation [7] commercial operation [7] commercial operation [7] commercial operation [7] playback duration isd2560 isd2575 isd2590 isd25120 t play 58.1 72.6 87.1 116.1 60.0 75.0 90.0 120.0 62.0 77.5 93.0 123.9 sec sec sec sec commercial operation [7] commercial operation [7] commercial operation [7] commercial operation [7] ce pulse width t ce 100 nsec control/address setup time t set 300 nsec control/address hold time t hold 0 nsec power-up delay isd2560 isd2575 isd2590 isd25120 t pud 24.1 30.2 36.2 48.2 25.0 31.3 37.5 50.0 27.8 34.3 40.8 53.6 msec msec msec msec commercial operation commercial operation commercial operation commercial operation pd pulse width (record) isd2560 isd2575 isd2590 isd25120 t pdr 25.0 31.25 37.5 50.0 msec msec msec msec
isd2560/75/90/120 publication release date: april 24, 2006 - 27 - revision 1.2 table 11: ac parameters ? die (cont?d) characteristic symbol min [2] typ [1] max [2] units conditions pd pulse width (play) isd2560 isd2575 isd2590 isd25120 t pdp 12.5 15.625 18.75 25.0 msec msec msec msec pd pulse width (static) t pds 100 nsec [6] power down hold t pdh 0 nsec eom pulse width isd2560 isd2575 isd2590 isd25120 t eom 12.5 15.625 18.75 25.0 msec msec msec msec overflow pulse width t ovf 6.5 sec total harmonic distortion thd 1 3 % @ 1 khz speaker output power p out 12.2 50 mw r ext = 16 ? [4] voltage across speaker pins v out 2.5 v p-p r ext = 600 ? mic input voltage v in1 20 mv peak-to-peak [5] ana in input voltage v in2 50 mv peak-to-peak aux input voltage v in3 1.25 v peak-to-peak; r ext = 16 ? notes: [1] typical values @ t a = 25 q c and v cc = 5.0v. [2] all min/max limits are guaranteed by winbond via electrical test ing or characterization. no t all specifications are 100 percent tested. [3] low-frequency cutoff depends upon the value of ex ternal capacitors (see pin descriptions) [4] from aux in; if ana in is driven at 50 mv p-p, the p out = 12.2 mw, typical. [5] with 5.1 k ? series resistor at ana in. [6] t pds is required during a static condition, typically overflow. [7] sampling frequency and playback duration can vary as much as r 2.25 percent over the commercial temperature range. for greater stability, an external clock can be utilized (see pin descriptions) [8] filter specification applies to the antialiasing filter and the smoothing filter. therefore, from input to output, expect a 6 db drop by nature of passing through both filters.
isd2560/75/90/120 - 28 - 10.2.1. typical parameter variation with voltage and temperature (die) -40 25 50 temperature (c) percent change (%) -1.0 -0.8 -0.6 -0.4 -0.2 0 0.2 chart 8: oscillator stability 6.5 volts 5.5 volts 4.5 volts -40 25 50 temperature (c) percent distortion (%) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0 chart 6: total harmonic distortion 6.5 volts 5.5 volts 4.5 volts 5 10 15 20 25 30 -40 25 50 temperature (c) 0 operating current (ma) chart 5: record mode operating current (i cc ) 6.5 volts 5.5 volts 4.5 volts -40 25 50 temperature (c) standby current (ma) 0 chart 7: standby current (i sb ) 0.2 0.4 0.6 0.8 1.0 6.5 volts 5.5 volts 4.5 volts
isd2560/75/90/120 publication release date: april 24, 2006 - 29 - revision 1.2 10.3. p arameters f or p ush -b utton m ode table 12: parameters for push-button mode parameter symbol min [2] typ [1] max [2] unit s conditions ce pulse width (start/pause) t ce 300 nsec control/address setup time t set 300 nsec power-up delay isd2560 isd2575 isd2590 isd25120 t pud 25.0 31.25 37.25 50.0 msec msec msec msec pd pulse width (stop/restart) t pd 300 nsec ce to eom high t run 25 400 nsec ce to eom low t pause 50 400 nsec ce high debounce isd2560 isd2575 isd2590 isd25120 t db 70 85 105 135 105 135 160 215 msec msec msec msec notes: [1] typical values @ t a = 25 c and v cc = 5.0v. [2] all min/max limits are guaranteed by winbond via electrical test ing or characterization. no t all specifications are 100 percent tested.
isd2560/75/90/120 - 30 - 11. typical application circuit v cc v ccd v cca v ssd v ssa sp+ sp- mic ref mic agc aux in ana in ana out a0 a1 a2 a3 a4 a5 a6 a8 a9 ce pd p/r oem ovf xclk 100 k r4 v ss chip enable power down playback/record c3 0.1 f 5.1 k r6 c2 4.7 f 470 k r2 c5 0.1 f 10 k r5 electret microphone speaker 16 v cc c6 0.1 f c7 0.1 f c8 22 f v cc c1 0.1 f c4 220 f 1 k r1 10 k r3 isd2560/75/90/120 1 2 3 4 5 6 7 9 10 23 24 27 25 22 26 19 17 18 21 20 11 15 14 13 12 16 28 (note) a7 8 figure 5: design schematic note: if desired, pin 18 (pdip package) may be left unc onnected (microphone preamplifier noise will be higher). in this case, pin 18 must not be tied to any other signal or voltage. additional des ign example schematics are provided below.
isd2560/75/90/120 publication release date: april 24, 2006 - 31 - revision 1.2 table 13: application example ? basic device control control step function action 1 power up chip and select record/playback mode 1. pd = low, 2. p/ r = as desired 2 set message address for record/playback set addresses a0-a9 3a begin playback p/ r = high, ce = pulse low 3b begin record p/ r = low, ce = low 4a end playback automatic 4b end record pd or ce = high table 14: application example ? passive component functions part function comments r1 microphone power supply decoupli ng reduces power supply noise r2 release time constant sets release time for agc r3, r5 microphone biasing resistors provides biasing for microphone operation r4 series limiting resistor reduces level to prevent distortion at higher supply voltages r6 series limiting resistor reduces level to high supply voltages c1, c5 microphone dc-blocking capacitor low- frequency cutoff decouples microphone bias from chip. provides single-pole low-frequency cutoff and command mode noise rejection. c2 attack/release time constant sets attack/release time for agc c3 low-frequency cutoff capacitor prov ides additional pole for low-frequency cutoff c4 microphone power supply decoupli ng reduces power supply noise c6, c7, c8 power supply capacitors filter and bypass of power supply
isd2560/75/90/120 - 32 - s2 v cc u 1 pb0 pb1 pa0 pa1 osc1 osc2 reset irq pa2 pa3 pa4 pa5 pa6 pa7 v dd v ss s1 26 u 2 v ccd v cca v ssd v ssa sp+ sp- mic ref mi c agc aux in ana in ana out a0 a1 a2 a3 a4 a5 a6 a8 a9 ce pd p/r oem ovf xclk isd2560/75/90/120 1 2 3 4 5 6 7 9 10 23 24 27 25 22 19 17 18 21 20 11 15 14 13 12 16 28 s3 record play msg# mc68hc705k1a run d 1 r 1 t bd a7 8 figure 6: isd2560/75/90/120 applicatio n example ? microcontroller/isd2500 interface in this simplified block diagram of a microcont roller application, the push-button mode and message cueing are used. the microcontroller is a 16-pin version with enough port pins for buttons, an led, and the isd2500 series device. the software can be written to use three buttons: one each for play and record, and one for message selection. because the microcontroller is interpreting the buttons and commanding the isd2500 device, software can be wr itten for any function desired in a particular application. note: winbond does not recommend connecting address lines directly to a microprocessor bus. address lines should be externally latched.
isd2560/75/90/120 publication release date: april 24, 2006 - 33 - revision 1.2 isd2560/75/90/120 v ccd v cca v ssd v ssa sp+ sp- mic ref mic agc aux in ana in ana out a0 a1 a2 a3 a4 a5 a6 a8 a9 ce pd p/r oem ovf xclk c2 4.7 f 470 k r2 c5 0.1 f 10 k r5 electret microphone speaker 16 v cc c1 0.1 f c4 220 f 1 k r1 10 k r3 c3 0.1 f 5.1 k r4 v cc c4 0.1 f c1 0.1 f c5 22 f 19 17 18 21 20 11 15 14 13 12 16 28 100 k r7 v ss start / pause stop / reset playback / record 1 2 3 4 5 6 7 9 10 23 24 27 25 22 26 v cc v cc v cc (note) r6 100 k a7 8 s1 s1 figure 7: isd2560/75/90/120 appli cation example ? push-button note: please refer to page 13 for more details.
isd2560/75/90/120 - 34 - table 15: application example ? push-button control control step function action 1 select record/playback mode p/ r = as desired 2a begin playback p/ r = high, ce = pulse low 2b begin record p/ r = low, ce = pulse low 3 pause record or playback ce = pulsed low 4a end playback automatic at eom marker or pd = pulsed high 4b end record pd = pulsed high table 16: application example ? passive component functions part function comments r2 release time constant sets release time for agc r4 series limiting resistor reduces level to prevent distortion at higher supply voltages r6, r7 pull-up and pull-down resistors defines static state of inputs c1, c4, c5 power supply capacitors filters and bypass of power supply c2 attack/release time constant sets attack/release time for agc c3 low-frequency cutoff capacitor prov ides additional pole for low-frequency cutoff
isd2560/75/90/120 publication release date: april 24, 2006 - 35 - revision 1.2 12. package drawing and dimensions 12.1. 28-l ead 300-m il p lastic s mall o utline ic (soic) 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 45 67 8 910 11 12 13 14 a d e f b g c h inches millimeters min nom max min nom max a 0.701 0.706 0.711 17.81 17.93 18.06 b 0.097 0.101 0.104 2.46 2.56 2.64 c 0.292 0.296 0.299 7.42 7.52 7.59 d 0.005 0.009 0.0115 0.127 0.22 0.29 e 0.014 0.016 0.019 0.35 0.41 0.48 f 0.050 1.27 g 0.400 0.406 0.410 10.16 10.31 10.41 h 0.024 0.032 0.040 0.61 0.81 1.02 note: lead coplanarity to be within 0.004 inches.
isd2560/75/90/120 - 36 - 12.2. 28-l ead 600-m il p lastic d ual i nline p ackage (pdip) inches millimeters min nom max min nom max a 1.445 1.450 1.455 36.70 36.83 36.96 b1 0.150 3.81 b2 0.065 0.070 0.075 1.65 1.78 1.91 c1 0.600 0.625 15.24 15.88 c2 0.530 0.540 0.550 13.46 13.72 13.97 d 0.19 4.83 d1 0.015 0.38 e 0.125 0.135 3.18 3.43 f 0.015 0.018 0.022 0.38 0.46 0.56 g 0.055 0.060 0.065 1.40 1.52 1.62 h 0.100 2.54 j 0.008 0.010 0.012 0.20 0.25 0.30 s 0.070 0.075 0.080 1.78 1.91 2.03 q 0 15 0 15
isd2560/75/90/120 publication release date: april 24, 2006 - 37 - revision 1.2 12.3. 28-l ead 8 x 13.4 mm p lastic t hin s mall o utline p ackage (tsop) t ype 1 min nom max min nom max a 0.520 0.528 0.535 13.20 13.40 13.60 b 0.461 0.465 0.469 11.70 11.80 11.90 c 0.311 0.315 0.319 7.90 8.00 8.10 d 0.002 0.006 0.05 0.15 e 0.007 0.009 0.011 0.17 0.22 0.27 f 0.0217 0.55 g 0.037 0.039 0.041 0.95 1.00 1.05 h 0 0 3 0 6 0 0 0 3 0 6 0 i 0.020 0.022 0.028 0.50 0.55 0.70 j 0.004 0.008 0.10 0.21 note: lead coplanarity to be within 0.004 inches. inches millimeters plastic thin small outline package (tsop) type 1 dimensions 5 6 7 8 9 10 11 12 13 14 2 3 4 15 16 17 18 19 20 21 22 23 24 25 26 27 28 a b g f c d e h j i a b g c f e h j 4 8 10 1 2 3 5 6 7 9 11 12 13 14 18 20 24 17 16 15 19 21 22 23 25 26 27 28
isd2560/75/90/120 - 38 - 12.4. 28-l ead 8 x 13.4 mm p lastic t hin s mall o utline p ackage (tsop) t ype 1 - iqc a a a 2 1 l l 1 y e h d d b e c min. dimension in inches nom. max. min. nom. max. symbol 1.20 0.05 0.15 1.05 1.00 0.95 0.17 0.10 11.70 7.90 13.20 0.50 0.00 0 0.20 0.27 0.15 0.21 11.80 11.90 8.00 8.10 13.40 13.60 0.55 0.60 0.70 0.80 0.10 35 0.047 0.006 0.041 0.040 0.035 0.007 0.008 0.011 0.004 0.006 0.008 0.461 0.465 0.469 0.311 0.315 0.319 0.520 0.528 0.536 0.022 0.020 0.024 0.028 0.031 0.000 0.004 035 0.002 a a b c d e e l l y 1 1 2 a h d dimension in mm
isd2560/75/90/120 publication release date: april 24, 2006 - 39 - revision 1.2 12.5. isd2560/75/95/120 p roduct b onding p hysical l ayout (d ie ) [1] isd2560/75/95/120 o die dimensions x: 149.5 + 1 mils y: 262.0 + 1 mils o die thickness [2] 11.5 + .4 mils o pad opening 111 x 111 microns 4.4 x 4.4 mils notes: [1] the backside of die is internally connected to v ss . it must not be connected to any other potential or damage may occur. [2] die thickness is subject to change, please contact winbond factor y for status and availability. isd2560/75/90/120 x a 3 a 2 a 1 a 0 v ccd p/r xclk eom pd ce ovf a 4 a 5 a 6 a na out a na in a gc mic ref mic sp- sp+ v ssd a ux in a 9 a 8 a 7 v ssa v cca
isd2560/75/90/120 - 40 - isd2560/75/90/120 product pad designations (with respect to die center) pad pad name x axis (m) y axis (m) a0 address 0 -897.9 3135.2 a1 address 1 -1115.4 3135.2 a2 address 2 -1331.0 3135.2 a3 address 3 -1544.0 3135.2 a4 address 4 -1640.4 2888.9 a5 address 5 -1698.2 2671.0 a6 address 6 -1698.2 2441.5 a7 address 7 -1731.2 -2583.2 a8 address 8 -1731.2 -2768.4 a9 address 9 -1731.2 -3050.8 aux in auxiliary input -1410.2 -3115.7 v ssd v ss digital power supply -1112.4 -3096.5 v ssa v ss analog power supply -408.2 -3138.9 sp+ speaker output + -46.65 -3068.4 sp- speaker output - 386.1 -3068.4 v cca v cc analog power supply 746.9 -3110.8 mic microphone input 1101.2 -3146.0 mic ref microphone reference 1294.7 -3146.0 agc automatic gain control 1666.4 -3130.3 ana in analog input 1728.6 -2654.0 ana out analog output 1700.9 -2411.0 ovf overflow output 1674.6 2489.5 ce chip enable input 1726.7 2824.4 pd power down input 1730.5 3094.0 eom end of message 1341.2 3122.1 xclk no connect (optional) 986.5 3160.7 p/ r playback/record 807.2 3163.4 v ccd v cc digital power supply 544.4 3159.6
isd2560/75/90/120 publication release date: april 24, 2006 - 41 - revision 1.2 13. ordering information product number descriptor key when ordering isd2560/75/90/120 products, please refe r to the following part numbers. also, please contact the local winbond sales representative or di stributor for availability on the lead-free parts. for the latest product information, access winbond?s worldwide website at http://www.winbond- usa.com type package 60 seconds 75 seconds 90 seconds 120 seconds die die isd2560x isd2575x isd2590x isd25120x pdip isd2560p isd2575p isd2590p isd25120p soic isd2560s isd2575s isd2590s isd25120s leaded tsop isd2560e isd2575e isd2590e pdip isd2560py isd2575py isd2590py isd25120py soic isd2560sy ISD2575SY isd2590sy isd25120sy lead-free tsop isd2560ey isd2575ey isd2590ey package type: p = 28-lead 600mil plastic dual inline package (pdip) s = 28-lead 300mil small outline integrated circuit (soic) e = 28-lead 8x13.4 mm thin small outline package (tsop) type 1 x = die special temperature field: blank = commercial packaged (0 ? c to +70 ? c) or commercial die (0 ? c to +50 ? c) isd2 5 _ isd2500 series duration: 60 = 60 seconds 75 = 75 seconds 90 = 90 seconds 120 = 120 seconds package option: y = lead-free blank = leaded
isd2560/75/90/120 - 42 - 14. version history version date description 0 apr. 1998 preliminary specifications 1.0 may 2003 re-format the document. update tsop pin configuration. revise overflow pad designation. 1.1 apr 2005 revise the disclaim section. 1.2 apr 2006 update tsop packaging information. add lead-free option.
isd2560/75/90/120 publication release date: april 24, 2006 - 43 - revision 1.2 winbond products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, or fo r other applications intended to support or sustain life. furthermore, winbond products are not intended fo r applications wherein failure of winbond products could result or lead to a situation wherein personal injury, deat h or severe property or environmental damage could occur. winbond customers using or selling these products for use in su ch applications do so at their own risk and agree to fully indemnify winbond for any damages resulting from such improper use or sales. the contents of this document are provided only as a guide for the applications of winbond products. winbond makes no representation or warranties with respect to the accuracy or completeness of the c ontents of this publication and reserves the right to discontinue or make changes to specif ications and product descriptions at any time without notice. no license, whether express or implied, to any intellectual property or other right of winbond or others is granted by this publication. except as set forth in winbond's standard terms and conditions of sale, winbond assumes no liability whatsoever and disclaims any express or implied warrant y of merchantability, fitness for a particular purpose or infringement of any intellectual property. the contents of this document are pr ovided ?as is?, and winbond assumes no liability whatsoever and disclaims any express or implied warranty of merchant ability, fitness for a particular purpose or infringement of any intellectual property. in no event, shall winbond be liable for any damages w hatsoever (including, wit hout limitation, damages for loss of profits, business interruption, loss of information) arising out of the use of or inability to use the contents of this documents, even if winbond has been advised of the possibility of such damages. application examples and alternative uses of any integrated circuit contained in this publication are for illustration only and winbond makes no representation or warranty that such applications shall be suitable for the use specified. the 100-year retention and 100k record cycle projections are based upon accelerated reliability tests, as published in the winbond reliability report, and are nei ther warranted nor guaranteed by wi nbond. this product incorporates superflash ? . information contained in this isd ? chipcorder ? datasheet supersedes all data fo r the isd chipcorder products published by isd ? prior to august, 1998. this datasheet and any future addendum to this datasheet is(are) the complete and controlling isd ? chipcorder ? product specifications. in the event any inconsistenc ies exist between the information in this and other product documentation, or in the event that other product documentat ion contains information in addition to the information in this, the information contained herein supersedes and governs su ch other information in its entirety. this datasheet is subject to change without notice. copyright ? 2005, winbond electronics corporation. all rights reserved. chipcorder ? and isd ? are trademarks of winbond electronics corporation. superflash ? is the trademark of silicon storage technology, inc. all other trademarks are properties of their respective owners.


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